Fin field-effect transistors (FinFETs) are multi-gate transistors where the conducting channel is wrapped around a thin piece of silicon, often referred to and configured as a “fin.” The dimensions of the fin structure determine the effective channel width of the transistor. Typically, the source, drain and gate are formed extending above the substrate, and the FinFET is viewed as a MOSFET device with a folded gate feature. Vertically-oriented FinFETs (having channels substantially perpendicular to the wafer surface) have corresponding source and drain regions oriented vertically—and these are sometimes referred to as “nanowire” (NW) devices. These types of structures are promising candidates for small line width technology (e.g., 7 nanometer and smaller) because of their excellent short channel effect control, scalability and higher current drive per unit width. However, various challenges exist, such as control of the gate length, formation of the extension region, difficulty in maintaining symmetrical devices, and integration with existing process flows.
Accordingly, there is a need for new FinFET-type device and structure (and methods of manufacture/fabrication) that allows easy formation of extension regions, maintains symmetry in the devices and assists in control of the gate length.